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| MN3300 Series MN3304 512-Stage Ultra Low Voltage Operation BBD for Audio Signals s Overview The MN3304 is a 512-stage ultra low voltage operation BBD variable delay line in audio frequency range. The device operates on +3V supply and provides a signal delay up to 25.6 ms and is suitable for use as reverberation effect of low voltage operation audio equipment such as portable stereo, radio cassette recorder and microphone. GND 1 2 3 4 MN3304 8 7 6 5 VD2 OUT CP1 VD1 s Pin Assignment s Features * Variable signal delay of the audio signal : 0.256 to 25.6 ms * Wide range of supply voltage : 1.8 to 5.0 V * No insertion loss : Li=0 dB typ. * Wide dynamic range : S/N=73 dB typ. * Low distortion : THD=0.7 % typ. (Vi=0.22 Vrms) * Clock frequency range : 10 to 200 kHz (1.8 VVDD<4.0 V) 10 kHz to 1 MHz (4.0 VVDD5.0 V) * N-channel 2-layer silicon gate process * 8-Pin Dual-In-Line Plastic Package CP2 IN VDD DIP008-P-0300 CP1 6 * Reverberation and echo effects of audio equipment such as radio cassette recorder, car radio, portable radio, portable stereo, echo microphone and Karaoke machine, etc. * Sound effect of electronic musical instruments * Variable or fixed delay of analog signals 2 CP2 s Applications s Block Diagram 8 7 5 VD2 OUT VD1 IN 3 512-Stage BBD 4 s Pin Descriptions Pin No. Symbol 1 2 3 4 GND CP2 IN VDD Pin Name Ground pin Clock input 2 Signal input pin VDD apply pin Connected to ground. Basic clock pulse is applied to transfer electric charge of BBD. Analog signal to be delayed is input. Most suitable DC bias should be applied to this pin. Bias is applied to the gate of MOS transistor which is inserted in series with clock pulse input gate of the BBD transfer gate. Furthermore, voltage is supplied to step-up circuit. The same phase clock pulse as CP1 is applied through capacitor. Clock pulse of inverted phase to CP2 is applied. Composed signal of 1024th and 1025th stages is output. The same phase clock pulse as CP2 is applied through capacitor. Description 5 6 7 8 VD1 CP1 OUT VD2 VD1 apply pin Clock input 1 Output pin VD2 apply pin GND VDD 1 1 MN3304 s Absolute Maximum Ratings Ta=25C Parameter Pin voltage Output voltage Operating ambient temperature Storage temperature Symbol VDD, VD1, VD2, VCP, VI VO Topr Tstg Ratings - 0.3 to +6.0 - 0.3 to +6.0 -20 to +60 -55 to +125 MN3300 Series Unit V V C C s Operating Conditions Ta=25C Parameter Supply voltage Clock voltage "H"level Clock voltage "L"level Clock input capacitance Clock frequency Clock pulse width Clock rise time Clock fall time Clock cross point Note) *1 : ( ) : VDD=4.0 to 5.0 V *2 : T=1/fCP (Clock period) Symbol VDD VCPH VCPL CCP fCP tw(CP)*3 tr(CP)*3 tf(CP) *3 Conditions min +1.8 typ +3.0 VDD 0 max +5.0 Unit V V V 400 10 200(1000)*1 0.5T*2 500 500 0 *3 : Clock pulse waveforms CP2 tr(CP) 90% 50% 10% tw(CP) T pF kHz ns ns V 3V V X* 3 0.3VCPH tf(CP) CP1 VX s Electrical Characteristics VDD=VCPH=3V, VCPL=0V, RL=56k, LPF : fC=20kHz, Att=48dB/oct., Ta=25C Parameter Supply current Signal delay time 1 Signal delay time 2 Input signal frequency Input signal amplitude Insertion loss Total harmonic distortion Output noise voltage Signal to noise ratio Note) * : N=BBD stages Symbol IDD tD1 tD2 fi i Li THD Vno S/N fCP=40 kHz VDD=1.8 to 4.0 V, fCP=10 to 200 kHz VDD=4.0 to 5.0 V, fCP=10 kHz to 1 MHz fCP=40 kHz, Vi=0.22 Vrms Output attenuation3 dB(0 dB at fi=1 kHz) fCP=40 kHz, fi=1 kHz, THD=2.5 % fCP=40 kHz, fi=1 kHz, Vi=0.22 Vrms fCP=40 kHz, fi=1 kHz, Vi=0.22 Vrms fCP=100 kHz, Weighted by "A"curve 12 0.32 -4 0.5 0 0.7 0.098 73 4 2.5 0.2 Conditions min typ 0.05 N* 2*fCP kHz Vrms dB % mVrms dB max Unit mA ms s Circuit Diagram 8 VD2 IN 3 GND 1 VDD 4 CP1 6 CP2 2 5 VD1 1 2 3 512 513 7 OUT 2 MN3300 Series s Typical Characteristics VO VI 6 VDD=3V fCP=40kHz Ta=25C MN3304 Vo Vi 20 THD Vi THD (%) VDD=3V fCP=40kHz fi=1kHz Ta=25C 6 VDD=3V fCP=40kHz fi=1kHz Ta=25C 4 Output signal level Vo (dBm) 5 10 5 VO (V) 0 4 3 -10 Total harmonic distortion DC output voltage 3 2 -20 -30 -40 -40 2 1 1 0 0 1 2 3 4 -30 -20 -10 0 10 0 -20 -15 -10 -5 0 5 DC input voltage VI (V) Input signal level Vi (dBm) Input signal level Vi (dBm) -100 Vno fCP VDD=3V Ta=25C Gi fi 4 VDD=3V Ta=25C 10 Gi Vi VDD=3V fi=1kHz fCP=40kHz Ta=25C Output noise voltage Vno (dBm) -90 2 5 -80 Gi (dB) Gi (dB) Insertion gain 0 fCP=100kHz 0 Insertion gain -70 -2 -5 -60 -50 -40 20 -4 10kHz -6 0.1 40kHz 0.3 1 3 10 30 100 -10 40 60 80 100 120 140 160 180 -15 -20 -15 -10 -5 0 5 10 Clock frequency fCP (kHz) Input frequency fi (kHz) Input signal level Vi (dBm) Gi fCP 5 4 3 THD VBias Total harmonic distortion THD (%) VDD=3V fi=1kHz Ta=25C 6 VDD=3V fi=1kHz fCP=40kHz Vi=0.22Vrms Ta=25C Gi Ta 3 2 VDD=3V fi=1kHz fCP=40kHz 5 Gi (dB) 2 1 0 -1 -2 -3 -4 -5 1 3 10 30 100 300 1000 4 Gi (dB) Insertion gain 1 0 -1 -2 -3 -4 -5 -40 -20 Insertion gain 3 2 1 0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0 20 40 60 80 100 120 Clock frequency fCP (kHz) Input bias voltage VBias (V) Ambient temperature Ta (C) 3 MN3304 s Typical Characteristics (To be continued) Vi(max) Ta 1 0 -1 -2 -3 -4 -5 -6 -7 -40 -20 0 -40 -20 40 MN3300 Series fi Ta 1.6 THD Ta THD (%) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -40 -20 VDD=3V fi=1kHz fCP=40kHz Vi=0.22Vrms Vi(max) (dBm) VDD=3V fCP=40kHz fi=1kHz THD=2.5% VDD=3V fCP=40kHz Vo(fi)=Vo(1kHz)-3dB fi (kHz) 30 Input signal level 20 10 0 20 40 60 80 100 120 0 20 40 60 80 100 120 Total harmonic distortion Input frequency 0 20 40 60 80 100 120 Ambient temperature Ta (C) Ambient temperature Ta (C) Ambient temperature Ta (C) s Supply Voltage Characteristics VBias VDD 6 Ta=25C 4 THD VDD 22 fi VDD fCP=40kHz Vo(fi)=Vo(1kHz)-3dB Ta=25C THD (%) 5 VBias (V) 3 Input frequency fi (kHz) fCP=40kHz fi=1kHz Vi=Vi(max)-6dB Ta=25C 20 4 18 Total harmonic distortion Input bias voltage 3 2 16 2 14 1 1 12 0 0 2 4 6 8 0 10 0 2 4 6 8 0 2 4 6 8 Supply voltage VDD (V) Supply voltage VDD (V) Supply voltage VDD (V) Vi(max) VDD 20 fCP=40kHz fi=1kHz THD=2.5% Ta=25C 4 3 2 1 0 -1 -2 -3 Gi VDD 110 fCP=40kHz fi=1kHz Vi=Vi(max)-6dB Ta=25C S/N VDD Ta=25C Vi(max) (dBm) Gi (dB) 10 Signal to noise ratio S/N (dB) 100 90 Input signal level 0 Insertion gain 80 70 -10 60 -20 0 2 4 6 8 -4 0 2 4 6 8 50 0 2 4 6 8 Supply voltage VDD (V) Supply voltage VDD (V) Supply voltage VDD (V) 4 MN3300 Series s Package Dimensions (Unit : mm) * DIP008-P-0300 MN3304 9.60.4 8 5 1 4 3.30.2 6.40.2 2.54 0.50.1 1.30.1 0 to 15 3.450.30 4.8max. 0.7min. 7.620.20 0.25 -0 +0.20 .05 SEATING PLANE 5 |
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